Verilog::ParserEasily parse Verilog language files | |
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- License:
- Perl Artistic License
- Price:
- FREE
- Publisher Name:
- Wilson Snyder
- Publisher web site:
- http://search.cpan.org/~wsnyder/Verilog-Perl-3.035/Parser/Parser.pm
Verilog::Parser Tags
Verilog::Parser Description
Easily parse Verilog language files Verilog::Parser is a Perl module that can parse Verilog language files.SYNOPSIS use Verilog::Parser; my $parser = new Verilog::Parser; $string = $parser->unreadback (); $line = $parser->lineno (); $parser->parse ($text) $parser->parse_file ($filename)Verilog::Parser will tokenize a Verilog file when the parse() method is called and invoke various callback methods. This is useful for extracting information and editing files while retaining all context. For netlist like extractions, see Verilog::Netlist.See the "Which Package" section of Verilog::Language if you are unsure which parsing package to use for a new application. Requirements: · Perl
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